Memory component with input/output data rate alignment

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12229435
APP PUB NO 20240289047A1
SERIAL NO

18412731

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Abstract

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First data is read out of a core storage array of a memory component over a first time interval constrained by data output bandwidth of the core storage array. After read out from the core storage array, the first data is output from the memory component over a second time interval that is shorter than the first time interval and that corresponds to a data transfer bandwidth greater than the data output bandwidth of the core storage array.

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Patent Owner(s)

  • RAMBUS INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Linstadt, John Eric Palo Alto, US 166 392
Partsch, Torsten San Jose, US 69 739
Ware, Frederick A Los Altos Hills, US 803 11661

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