Semiconductor device comprising wiring layer over driver circuit
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United States of America
Stats
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Feb 11, 2025
Grant Date -
Feb 8, 2024
app pub date -
Oct 23, 2023
filing date -
Oct 23, 2023
priority date (Note) -
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status (Latency Note)
Importance
Abstract
The memory capacity of a DRAM is enhanced. A semiconductor memory device includes a driver circuit including part of a single crystal semiconductor substrate, a multilayer wiring layer provided over the driver circuit, and a memory cell array layer provided over the multilayer wiring layer. That is, the memory cell array overlaps with the driver circuit. Accordingly, the integration degree of the semiconductor memory device can be increased as compared to the case where a driver circuit and a memory cell array are provided in the same plane of a substrate containing a singe crystal semiconductor material.
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