Compiler operations for tensor streaming processor

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12222894
APP PUB NO 20230359584A1
SERIAL NO

18351916

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Abstract

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Embodiments are directed to a processor having a functional slice architecture. The processor is divided into tiles (or functional units) organized into a plurality of functional slices. The functional slices are configured to perform specific operations within the processor, which includes memory slices for storing operand data and arithmetic logic slices for performing operations on received operand data (e.g., vector processing, matrix manipulation). The processor includes a plurality of functional slices of a module type, each functional slice having a plurality of tiles. The processor further includes a plurality of data transport lanes for transporting data in a direction indicated in a corresponding instruction. The processor also includes a plurality of instruction queues, each instruction queue associated with a corresponding functional slice of the plurality of functional slices, wherein the instructions in the instruction queues comprise a functional slice specific operation code.

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Patent Owner(s)

  • GROQ, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Abts, Dennis Charles Eau Claire, US 22 136
Ross, Jonathan Alexander Palo Alto, US 40 154
Thompson, John Minneapolis, US 160 2947
Thorson, Gregory Michael Palo Alto, US 61 832

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