Dual-edge-triggered flip-flop
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
Feb 4, 2025
Grant Date -
Feb 8, 2024
app pub date -
Jun 7, 2023
filing date -
Jun 7, 2023
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A flip-flop includes an input logic circuit, a first latch, a second latch, and an output multiplexer; where the input logic circuit outputs a clock bar signal based on an input data bit and a clock signal, where the first latch and the second latch operate based on the input data bit, the clock signal, and a clock bar signal, where the output multiplexer operates based on outputs from nodes of the first and second nodes and outputs an output data bit, and where the input logic circuit has a uniform value in a period where there is no change of a value of the output data bit.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully