Memory and operating method thereof

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12217795
APP PUB NO 20240203491A1
SERIAL NO

18595188

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Abstract

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A memory includes a memory device, a reading device and a feedback device. The memory device stores a plurality of bits. The reading device includes first and second reading circuits coupled to the memory device. The second reading circuit is coupled to the first reading circuit at a first node. The first and second reading circuits cooperates with each other to generate a first voltage signal at the first node based on at least one first bit of the plurality of bits. The feedback device adjusts at least one of the first reading circuit or the second reading circuit based on the first voltage signal. The first and second reading circuits generate a second voltage signal, different from the first voltage signal, corresponding to the bits, after the at least one of the first reading circuit or the second reading circuit is adjusted by the feedback device.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDNO 8 LI-HSIN ROAD 6 HSINCHU SCIENCE PARK HSINCHU 300
NATIONAL TSING HUA UNIVERSITYNO 101 SEC 2 KWANGFU RD HSINCHU CITY

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Meng-Fan Taichung, TW 157 744
Chiu, Yen-Cheng Hsinchu, TW 10 0

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