Power efficient circuits and methods for phase alignment
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
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Jan 28, 2025
Grant Date -
May 11, 2023
app pub date -
Oct 27, 2022
filing date -
Oct 27, 2022
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A timing-calibration circuit uses an active phase interpolator to calibrate clock delays through a number of passive fractional delay elements. The timing-calibration circuit minimizes system-wide power consumption by limiting the number and usage of active phase interpolators for delay adjustment in favor of the passive fractional delay elements.
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International Classification(s)
- 2022 Application Filing Year
- H03L Class
- 440 Applications Filed
- 300 Patents Issued To-Date
- 68.19 % Issued To-Date
Cited Art Landscape
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- 0 Citation Count
- H03L Class
- 0 % this patent is cited more than
- < 1 Age
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| 3.5 Year Payment | $1600.00 | $800.00 | $400.00 | Jul 28, 2028 |
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