Power-on-reset circuit

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12212319
APP PUB NO 20240128976A1
SERIAL NO

18231851

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Abstract

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The present application discloses a power-on-reset circuit, which optimizes a hysteresis circuit and a reset signal generation circuit, and introduces a seventh PMOS transistor as a switch transistor to achieve the differentiation of control voltages at a gate end of a first NMOS transistor during powering-on and off. A voltage rise detection point is determined by a partial voltage of a resistor during powering-on, while a voltage fall detection point is directly determined by a power supply voltage during powering-off. Such differentiation may achieve a significant separation between the voltage rise detection point and the voltage fall detection point, reducing the voltage fall detection point to near a threshold voltage of the first NMOS transistor, and meeting the demand for a lower voltage fall detection point, which is consistent with a practical application of the power-on-reset circuit in an MCU.

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Patent Owner(s)

Patent OwnerAddress
SHANGHAI HUALI MICROELECTRONICS CORPORATIONNO 6 LIANGTENG ROAD PUDONG NEW AREA SHANGHAI 201314

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jia, Yu Shanghai, CN 20 75
Qian, Yifei Shanghai, CN 11 17

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