Gate-all-around transistor with strained channels

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12211897
APP PUB NO 20230378266A1
SERIAL NO

18362778

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Abstract

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The present disclosure provides a semiconductor device with a plurality of semiconductor channel layers. The semiconductor channel layers include a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer. A strain in the second semiconductor layer is different from a strain in the first semiconductor layer. A gate is disposed over the plurality of semiconductor channel layers.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.; NATIONAL TAIWAN UNIVERSITY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chung, Chia-Che Hsinchu, TW 19 19
Huang, Yu-Shiang New Taipei, TW 27 29
Liu, Chee-Wee Taipei, TW 142 1392
Liu, Yi-Chun Taichung, TW 73 299
Lu, Fang-Liang New Taipei, TW 20 38
Tsai, Chung-En Hsinchu County, TW 21 35
Tu, Chien-Te Hsinchu, TW 15 5
Yeh, Hung-Yu Taichung, TW 15 19

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