Memory array, integrated circuit including the same, and manufacturing method thereof

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12211825
APP PUB NO 20230061475A1
SERIAL NO

17460324

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Abstract

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A memory array includes a first bit-line stack disposed over a substrate, a first spacer, a first data storage structure, and a word line. The first bit-line stack includes a first bit line disposed over the substrate; and a first hard mask layer partially covering a top surface of the first bit line. The first spacer is disposed on a lower sidewall of a first sidewall of the first bit line. The first hard mask layer and the first spacer expose a top corner of the first bit line. The first data storage structure covers the top corner of the first bit line. The word line covers a sidewall of the first data storage structure.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDNO 8 LI-HSIN ROAD 6 HSINCHU SCIENCE PARK HSINCHU 300

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yun, Wei-Sheng Taipei, TW 54 186

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