Managing reference currents in semiconductor devices
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United States of America Patent
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Jan 21, 2025
Grant Date -
Jun 6, 2024
app pub date -
Dec 6, 2022
filing date -
Dec 6, 2022
priority date (Note) -
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Abstract
Systems, devices, methods, and circuits for managing reference currents in semiconductor devices. In one aspect, a semiconductor device includes: a memory cell array configured to store data in sets of memory cells and circuitry coupled to the memory cell array. Each set of one or more sets of memory cells in the memory cell array is associated with a respective reference current, and memory cells in sets associated with different reference currents have different threshold voltage distributions. The circuitry is configured to: determine information associated with a reference current for a set of memory cells in the memory cell array based on a memory address corresponding to the set, generate the reference current based on the information associated with the reference current for the set, and sense one or more memory cells in the set based on the reference current.
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