Memory buffer with data scrambling and error correction

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United States of America Patent

PATENT NO 12205669
APP PUB NO 20240161795A1
SERIAL NO

18513473

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Abstract

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A method for operating a DRAM device. The method includes receiving in a memory buffer in a first memory module hosted by a computing system, a request for data stored in RAM of the first memory module from a host controller of the computing system. The method includes receiving with the memory buffer, the data associated with a RAM, in response to the request and formatting with the memory buffer, the data into a scrambled data in response to a pseudo-random process. The method includes initiating with the memory buffer, transfer of the scrambled data into an interface device.

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Patent Owner(s)

Patent OwnerAddress
RAMBUS INCSAN JOSE CA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Haywood, Christopher Fernandina Beach, US 70 401
Wang, David Westlake Village, US 218 2718

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