Shielded socket and carrier for high-volume test of semiconductor devices
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 21, 2025
Grant Date -
Jan 25, 2024
app pub date -
Sep 30, 2023
filing date -
Nov 2, 2020
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A test apparatus comprising a tester interface board (TIB) affixed in a slot of a tester rack, wherein the TIB comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT). The test apparatus further comprises a carrier comprising an array of DUTs, wherein the carrier is operable to slide into the slot of the tester rack, and wherein each DUT in the array of DUTs aligns with a respective socket on the TIB. Further, the test apparatus comprises a plurality of socket covers, wherein each socket cover of the plurality of socket covers is operable to actuate a top portion of each DUT of the array of DUTs in the carrier.
First Claim
Other Claims data not available
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- G01R Class
- 0 % this patent is cited more than
- < 1 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 3.5 Year Payment | $1600.00 | $800.00 | $400.00 | Jul 21, 2028 |
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Jul 21, 2032 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jul 21, 2036 |