Dual channel gate all around transistor device and fabrication methods thereof
Number of patents in Portfolio can not be more than 2000
United States of America
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Jan 14, 2025
Grant Date -
Nov 30, 2023
app pub date -
Aug 7, 2023
filing date -
Aug 7, 2023
priority date (Note) -
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Abstract
A semiconductor structure includes a fin disposed on a substrate, the fin including a channel region comprising a plurality of channels vertically stacked over one another, the channels comprising germanium distributed therein. The semiconductor structure further includes a gate stack engaging the channel region of the fin and gate spacers disposed between the gate stack and the source and drain regions of the fin, wherein each channel of the channels includes a middle section wrapped around by the gate stack and two end sections engaged by the gate spacers, wherein a concentration of germanium in the middle section of the channel is higher than a concentration of germanium in the two end sections of the channel, and wherein the middle section of the channel further includes a core portion and an outer portion surrounding the core portion with a germanium concentration profile from the core portion to the outer portion.
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