Decoding method, memory storage device and memory control circuit unit
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United States of America
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Jan 14, 2025
Grant Date -
Jun 20, 2024
app pub date -
Feb 14, 2023
filing date -
Feb 14, 2023
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Abstract
A decoding method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending at least one read command sequence instructing to read a first physical unit in a rewritable non-volatile memory module; receiving response data from the rewritable non-volatile memory module, wherein the response data includes a plurality of identification bits, and the plurality of identification bits reflect a voltage variation of a first bit line where a first memory cell in the first physical unit is located during a discharge process; determining a decoding parameter corresponding to the first memory cell according to the plurality of identification bits; and decoding data read from the first memory cell according to the decoding parameter.
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