Hardware offload circuitry

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12197601
APP PUB NO 20220114270A1
SERIAL NO

17560193

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Abstract

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Examples described herein relate to offload circuitry comprising one or more compute engines that are configurable to perform a workload offloaded from a process executed by a processor based on a descriptor particular to the workload. In some examples, the offload circuitry is configurable to perform the workload, among multiple different workloads. In some examples, the multiple different workloads include one or more of: data transformation (DT) for data format conversion, Locality Sensitive Hashing (LSH) for neural network (NN), similarity search, sparse general matrix-matrix multiplication (SpGEMM) acceleration of hash based sparse matrix multiplication, data encode, data decode, or embedding lookup.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Autee, Priya Chandler, US 10 46
Banerjee, Suvadeep San Jose, US 2 3
Davare, Abhijit Hillsboro, US 8 69
Ganesh, Brinda Portland, US 31 258
Ganguli, Mrittika Chandler, US 60 883
Gobriel, Sameh Dublin, US 42 548
Jain, Nilesh Portland, US 42 138
Kabisthalam, Muthukumar Sriram Bengaluru, IN 5 41
Kirkpatrick, Desmond Portland, US 2 20
Layek, Abhirupa Chandler, US 7 24
Murari, Nalini Hillsboro, US 1 0
Narayana, Shaman Chandler, US 1 3
Paul, Somnath Hillsboro, US 54 475
Ranganathan, Narayan Bangalore, IN 44 437
Sankaran, Rajesh M Portland, US 119 1164
Sorokin, Anton Portland, US 1 3
Timbadiya, Jaykant B Amreli Gujrat, IN 1 0
Tsai, Jr-Shian Portland, US 80 1480
Verplanke, Edwin Queen Creek, US 47 380
Wang, Ren Portland, US 210 2412
Wang, Yipeng Portland, US 40 292

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