Clock jitter and spurious tone cancellation system using optical delay

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12191870
APP PUB NO 20240259025A1
SERIAL NO

18162091

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Abstract

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Techniques to reduce or eliminate phase noise and jitter from a noisy clock signal. A method includes generating an electrical clock signal, generating a delayed optical clock signal based on the electrical clock signal, detecting a phase difference between the electrical clock signal and the delayed optical clock signal, and processing, based on the phase difference, the electrical clock signal to obtain a reduced phase noise version of the electrical clock signal.

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Patent Owner(s)

Patent OwnerAddress
CISCO TECHNOLOGY INC170 WEST TASMAN DRIVE SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bhat, Abhishek Allentown, US 27 49
Handanhal, Ramachandra Sujit Allentown, US 6 1

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