Multiple register clock driver loaded memory subsystem

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12189996
APP PUB NO 20240045620A1
SERIAL NO

18490589

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Abstract

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A memory subsystem architecture that includes two register clock driver (RCD) devices to increase a number of output drivers for signaling memories of the memory subsystem is described herein. In a two RCD device implementation, first and second RCD devices may contemporaneously provide first subchannel C/A information and second subchannel C/A information, respectively, to respective first and second group of memories of the memory subsystem responsive to a common clock signal. Because each of the first and second RCD devices operate responsive to the common clock signal, operation of the first and second RCD devices may be synchronized such that all subchannel driver circuits drive respective subchannel C/A information contemporaneously.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INC8000 SO FEDERAL WAY BOISE ID 83716-9632

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Greeff, Roy E Boise, US 42 333
Hollis, Timothy M Boise, US 159 1841
Leslie, Matthew B Boise, US 23 44

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