Apparatus for outputting internal state of memory apparatus and memory system using the apparatus
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United States of America
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Jan 7, 2025
Grant Date -
Mar 7, 2024
app pub date -
Nov 10, 2023
filing date -
Nov 10, 2023
priority date (Note) -
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Abstract
A memory system is provided and includes memory chips in each of which a first state output pin is arranged and a memory controller in which a first state input pin connected to a first channel including first ways respectively connected to the first state output pins arranged in the memory chips is arranged. The memory controller checks a first internal state of each of the memory chips, based on one or more of a chip enable signal and a CE reduction command of the memory chips, and a second signal received through the first state input pin as a result of an AND operation of first signals output through the first state output pins, during a state check interval for checking respective states of the memory chips.
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