Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance
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United States of America
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Dec 31, 2024
Grant Date -
Jan 25, 2024
app pub date -
Jun 27, 2023
filing date -
Jun 27, 2023
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Abstract
Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance are disclosed. A memory device of a semiconductor device may be set in an identification mode and provide an identification request to other memory devices that are coupled to a common communication channel. The memory devices that are coupled to the common communication channel may share an external resistance, for example, for calibration of respective programmable termination components of the memory devices. The memory devices that receive the identification request set a respective identification flag which can be read to determine which memory devices share an external resistance with the memory device having the set identification mode.
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