Amplitude regulator for crystal oscillator
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United States of America
Stats
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Dec 31, 2024
Grant Date -
Jan 18, 2024
app pub date -
Nov 19, 2021
filing date -
Nov 19, 2021
priority date (Note) -
In Force
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Abstract
An amplitude regulator circuit portion is arranged to supply a current to an inverter in an oscillator circuit. The regulator monitors a voltage at the input terminal of the inverter and varies the current supplied to the inverter in response to the monitored voltage. The amplitude regulator comprises first, second, and third PMOS transistors, and first and second NMOS transistors and is arranged such that an input node is connected to the input terminal of the inverter, a respective gate terminal of each of the first and second NMOS transistors, and a respective drain terminal of the first NMOS and first PMOS transistors. The amplitude regulator also comprises a back-bias circuit portions arranged to vary a back-bias voltage at a back-gate terminal of the second NMOS transistor, to vary a threshold voltage, where the threshold voltage of the second NMOS transistor is lower than that of the first NMOS transistor.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
NORDIC SEMICONDUCTOR ASA | OTTO NIELSENS VEG 12 TRONDHEIM 7052 |
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Wu, Hsin-Ta | Trondheim, NO | 13 | 120 |
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