Type III-V semiconductor device with multi-layer barrier region

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United States of America

PATENT NO 12183816
APP PUB NO 20230067452A1
SERIAL NO

17458827

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Abstract

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A semiconductor device includes a barrier region and a channel region, source and drain electrodes, and a gate structure that is configured to control a conductive connection between the source and drain electrodes, wherein the barrier region comprises a first barrier layer and a second barrier layer, wherein in a central portion of the device the second barrier layer is the only layer that is disposed over the channel region, wherein in outer lateral portions of the device the first barrier layer is disposed over the channel region, wherein the first and second barrier layers are each III-V semiconductor alloys, and wherein a molar fraction of a second type III element in the central portion is higher than a molar fraction of the second type III element in the first barrier layer.

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Patent Owner(s)

Patent OwnerAddress
INFINEON TECHNOLOGIES AUSTRIA AG2 SIEMENS STREET VILLACH AUSTRIA VILLACH CARINTHIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Daumiller, Ingo Oberaichwald, AT 13 67
Knuuttila, Lauri Villach, AT 3 1
Pandya, Bhargav Chandler, US 7 26
Reiser, Korbinian Ottobrunn, DE 3 1

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