Channel routing for simultaneous switching outputs
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United States of America
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Dec 24, 2024
Grant Date -
Dec 28, 2023
app pub date -
Jun 24, 2022
filing date -
Jun 24, 2022
priority date (Note) -
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Abstract
A data processor is for accessing a memory having a first pseudo channel and a second pseudo channel. The data processor includes at least one memory accessing agent, a memory controller, and a data fabric. The at least one memory accessing agent generates generating memory access requests including first memory access requests that access the memory. The memory controller provides memory commands to the memory in response to the first memory access requests. The data fabric routes the first memory access requests to a first downstream port in response to a corresponding first memory request accessing the first pseudo channel, and to a second downstream port in response to the corresponding first memory request accessing the second pseudo channel. The memory controller has first and second upstream ports coupled to the first and second downstream ports of the data fabric, respectively, and a downstream port coupled to the memory.
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