Error pin training with graphics DDR memory
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United States of America
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Nov 26, 2024
Grant Date -
May 11, 2023
app pub date -
Jun 30, 2022
filing date -
Jun 30, 2022
priority date (Note) -
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Abstract
A receiver is trained for receiving a signal over a data bus. A volatile memory is commanded over the data bus to place a selected pulse-amplitude modulation (PAM) driver in a mode with a designated steady output level. At a receiver circuit coupled to the selected PAM driver, a respective reference voltage associated with the designated steady output level is swept through a range of voltages and the respective reference voltage is compared to a voltage received from the PAM driver to determine a respective voltage level received from the PAM driver.
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