Processor that executes instruction that specifies instruction concatenation and atomicity
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United States of America
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Nov 26, 2024
Grant Date -
Mar 10, 2022
app pub date -
Nov 17, 2021
filing date -
Nov 17, 2021
priority date (Note) -
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Abstract
A processor includes a plurality of execution units. At least one of the execution units is configured to determine, based on a first field of a first instruction, a number of additional instructions to execute in conjunction with the first instruction and prior to execution of the first instruction. The at least one of the execution units is further configured to determine, based on a second field of the first instruction, a subset of the additional instructions to execute atomically.
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