Apparatus and method for testing all test circuits on a wafer from a single test site
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United States of America
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Nov 26, 2024
Grant Date -
Dec 29, 2022
app pub date -
Jun 24, 2022
filing date -
Jun 24, 2022
priority date (Note) -
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Abstract
An apparatus has a semiconductor wafer hosting rows and columns of chips, where the rows and columns of chips are separated by scribe lines. Vertical and horizontal routing lines are in the scribe lines interconnecting the rows and columns of chips. Test circuit sites are in the scribe lines, each test circuit site including contact pads for simultaneous connection to probe card needles, sensor circuit select and control circuitry, and a sensor circuit bank.
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