Heterogenous-latency memory optimization

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 12147351
APP PUB NO 20230333989A1
SERIAL NO

18139220

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Abstract

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Memory pages are background-relocated from a low-latency local operating memory of a server computer to a higher-latency memory installation that enables high-resolution access monitoring and thus access-demand differentiation among the relocated memory pages. Higher access-demand memory pages are background-restored to the low-latency operating memory, while lower access-demand pages are maintained in the higher latency memory installation and yet-lower access-demand pages are optionally moved to yet higher-latency memory installation.

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Patent Owner(s)

Patent OwnerAddress
RAMBUS INCSAN JOSE CA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Erickson, Evan Lawrence Chapel Hill, US 36 62
Haywood, Christopher Cary, US 70 401
Kellam, Mark D Siler City, US 37 836

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