Active matrix substrate
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United States of America
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Nov 12, 2024
Grant Date -
Sep 28, 2023
app pub date -
May 18, 2023
filing date -
May 18, 2023
priority date (Note) -
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status (Latency Note)
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Abstract
An active matrix substrate includes a plurality of source bus lines, a lower insulating layer covering the source bus lines, a plurality of gate bus lines formed above the lower insulating layer, and an oxide semiconductor TFT disposed to correspond to each pixel area. The oxide semiconductor TFT includes an oxide semiconductor layer disposed on the lower insulating layer, and a gate electrode disposed above the oxide semiconductor layer. The gate electrode is formed in a different layer from the gate bus lines, and is disposed to be separated from another gate electrode disposed in an adjacent pixel area. The gate electrode is covered by an interlayer insulating layer. The gate bus line is disposed on the interlayer insulating layer and in a gate contact hole formed in the interlayer insulating layer, and is connected to the gate electrode in the gate contact hole.
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