Memory devices for multiple read operations
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United States of America
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Nov 12, 2024
Grant Date -
Nov 30, 2023
app pub date -
Aug 11, 2023
filing date -
Aug 11, 2023
priority date (Note) -
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Abstract
Memory devices might include an array of memory cells, a plurality of access lines, and control logic. The array of memory cells includes a plurality of strings of series-connected memory cells. Each access line of the plurality of access lines is connected to a control gate of a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells. The control logic is configured to: open the array of memory cells for multiple read operations; read first page data from respective memory cells coupled to a selected access line of the plurality of access lines; read second page data from the respective memory cells coupled to the selected access line; and close the array of memory cells subsequent to reading the first page data and the second page data.
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