Memory module with local synchronization and method of operation
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United States of America
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Nov 5, 2024
Grant Date -
Jul 27, 2023
app pub date -
Nov 29, 2022
filing date -
Nov 29, 2022
priority date (Note) -
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Abstract
A memory module is operable in a computer system having a memory controller and a system bus and comprises memory devices organized in one or more ranks and in a plurality of groups, and circuits configurable to receive from the memory controller a system clock and input control and address (C/A) signals, and output registered C/A signals and buffer control signals. The memory module further comprises a plurality of buffer circuits. In response to the buffer control signals, each buffer circuit is configured to communicate first data/strobe signals with at least one memory device and to communicate second data/strobe signals with the memory controller.
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