Pillar-shaped semiconductor device and method for producing the same
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United States of America Patent
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Oct 22, 2024
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N/A
app pub date -
Dec 30, 2021
filing date -
Jul 11, 2019
priority date (Note) -
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Abstract
In formation of an SRAM cell, a band-shaped contact hole C3 is formed that does not overlap, in plan view. N+ layers 32a, 32c, 32d, and 32f formed on and at outer peripheries of the top portions of Si pillars 6a, 6c, 6d, and 6f, that partly overlaps W layers 33b and 33e on P+ layers 32b and 32e connected to the top portions of Si pillars 6b and 6e, that is connected in both the X direction and the Y direction, and that extends in the Y direction. A power supply wiring metal layer Vdd that connects the P+ layers 32b and 32e through the contact hole C3 is formed. After formation of the power supply wiring metal layer Vdd, a word wiring metal layer WL is formed so as to be orthogonal to the power supply wiring metal layer Vdd in plan view.
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