Echo cancelling system and echo cancelling method
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United States of America Patent
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Oct 8, 2024
Grant Date -
Oct 20, 2022
app pub date -
Oct 21, 2021
filing date -
Apr 14, 2021
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Abstract
A digital-to-analog converter circuit generates an analog transmitted signal according to a digital transmitted signal. A first echo canceller circuit generates a first echo cancelling signal according to the digital transmitted signal. A processor circuit generates an analog processed signal according to the analog transmitted signal, the first echo cancelling signal, and a received signal. An analog-to-digital converter circuit generates a digital value according to the analog processed signal and two slicer levels of a plurality of slicer levels. A storage circuit stores a look-up table. The look-up table records an offset value corresponding to the digital value. The storage circuit further outputs a first output signal according to the digital value and the offset value. The offset value is updated according to an error value associated with the first output signal.
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