Differential to single ended pipeline analog to digital converter
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United States of America Patent
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Oct 1, 2024
Grant Date -
Oct 26, 2023
app pub date -
Oct 4, 2022
filing date -
Apr 25, 2022
priority date (Note) -
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Abstract
A pipeline analog to digital converter includes a “k” number of stages and an output data register. A first stage of the “k” number of stages is configured to receive an analog differential input signal and produce a first digital output and a first single ended analog output. A second stage of the “k” number of stages is configured to receive the first single ended analog output and produce a second digital output. The output data register is configured to generate an output digital value based on the first and second digital outputs.
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