Maintaining phase coherence for a fractional-N PLL
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United States of America Patent
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Oct 1, 2024
Grant Date -
Jun 6, 2024
app pub date -
Dec 6, 2022
filing date -
Dec 6, 2022
priority date (Note) -
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status (Latency Note)
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Abstract
A fractional-N phase-locked loop (PLL) that maintains phase coherence for an output signal with a plurality of possible output frequencies. The fractional-N PLL includes an oscillator, a phase detector to receive a reference clock signal and a feedback signal, and a multi-modulus divider coupled in a feedback path between the oscillator and the phase detector. A multi-modulus pattern generator supplies a drive pattern to the multi-modulus divider to achieve a desired change in frequency of the output signal. The multi-modulus pattern generator initiates the drive pattern at a boundary time to cause the output signal to have a substantially repeatable phase when restarting switching from any one of the output frequencies to any other of the output frequencies.
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- 2022 Application Filing Year
- H03L Class
- 440 Applications Filed
- 300 Patents Issued To-Date
- 68.19 % Issued To-Date
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- H03L Class
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