Targets for diffraction-based overlay error metrology

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United States of America Patent

PATENT NO 12105414
APP PUB NO 20240118606A1
SERIAL NO

17923471

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Abstract

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A method for semiconductor metrology includes depositing first and second overlying film layers on a semiconductor substrate and patterning the layers to define an overlay target. The target includes a first grating pattern in the first layer, including at least a first linear grating oriented in a first direction and at least a second linear grating oriented in a second direction perpendicular to the first direction, and a second grating pattern in the second layer, including at least a third linear grating identical to the first linear grating and a fourth linear grating identical to the second linear grating. The second grating pattern has a nominal offset relative to the first grating pattern by first and second displacements in the first and second directions, respectively. A scatterometric image of the substrate is captured and processed to estimate an overlay error between the patterning of the first and second layers.

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Patent Owner(s)

Patent OwnerAddress
KLA CORPORATIONONE TECHNOLOGY DRIVE MILPITAS CA 95035

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gdor, Itay Halevi, IL 13 19
Hajaj, Eitan Ashqelon, IL 12 11
Levinski, Vladimir Migdal HaEmek, IL 106 1375
Lubashevsky, Yuval Haifa, IL 21 76
Negri, Daria Nesher, IL 36 316

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