Method for manufacturing semiconductor structure

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United States of America Patent

PATENT NO 12089392
APP PUB NO 20220246616A1
SERIAL NO

17457273

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Abstract

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An embodiment of the disclosure provides a method for manufacturing a semiconductor structure, including: providing a substrate, where the substrate has a peripheral region and an array region; stacking and forming an insulating layer and a mask layer with a mask pattern on the substrate; etching the insulating layer with the mask layer as a mask to form a contact hole penetrating the insulating layer at the array region; reserving the mask layer; in a direction perpendicular to a surface of the substrate, providing a thickness difference between the mask layer of the peripheral region and the mask layer of the array region; forming a first material layer; forming a second material layer; etching a part of the mask layer with the second material layer as the mask; and removing the remaining second material layer, the remaining mask layer and the first material layer on the remaining mask layer.

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Patent Owner(s)

Patent OwnerAddress
CHANGXIN MEMORY TECHNOLOGIES INC230000 ROOM 630 HAI HENG MANSION 6 CUI WEI ROAD HEFEI ECONOMIC AND TECHNOLOGICAL DEVELOPMENT ZONE ANHUI HEFEI CITY ANHUI PROVINCE 230000

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Li, Sen Hefei, CN 63 79
Liu, Tao Hefei, CN 613 3850
Wan, Qiang Hefei, CN 51 44
Xia, Jun Hefei, CN 90 369
Xu, Penghui Hefei, CN 29 2
Zhan, Kangshu Hefei, CN 29 2

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