Method of improving read current stability in analog non-volatile memory by post-program tuning for memory cells exhibiting random telegraph noise
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Sep 3, 2024
Grant Date -
Dec 8, 2022
app pub date -
Sep 21, 2021
filing date -
Sep 21, 2021
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory device and method for a non-volatile memory cell having a gate that includes programming the memory cell to an initial program state corresponding to a target read current and a threshold voltage, including applying a program voltage having a first value to the gate, storing the first value in a memory, reading the memory cell in a first read operation using a read voltage applied to the gate that is less than the target threshold voltage to generate a first read current, and subjecting the memory cell to additional programming in response to determining that the first read current is greater than the target read current. The additional programming includes retrieving the first value from the memory, determining a second value greater than the first value, and programming the selected non-volatile memory cell that includes applying a program voltage having the second value to the gate.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully