High-voltage tolerant multiplexer
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United States of America
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Aug 27, 2024
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N/A
app pub date -
Oct 31, 2022
filing date -
Oct 31, 2022
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Abstract
A differential multiplexer includes a number of input stages. Each stage includes, in part, first and second transistor receiving an input signal and the inverse of the input signal, a biasing circuit supplying a bias to the gate terminal of the first and second transistors, a current source coupled between a source terminal of the first and second transistors and a ground terminal, a first switch coupling a drain terminal of the first transistor to a first terminal of a first resistor having a second terminal coupled to a supply voltage, a second switch coupling a drain terminal of the second transistor to a first terminal of a second resistor having second terminal coupled to the supply voltage, a third switch coupling the drain terminal of the first transistor to the supply voltage, and a fourth switch coupling the drain terminal of the second transistor to the supply voltage.
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