Memory circuits, memory structures, and methods for fabricating a memory device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 20, 2024
Grant Date -
Nov 10, 2022
app pub date -
Dec 8, 2021
filing date -
May 6, 2021
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory structure includes a first memory array having bit lines; a second memory array having bit lines; a first sense amplifier connected to a first bit line of the first memory array and a first bit line of the second memory array; and a second sense amplifier connected to a second bit line of the first memory array and a second bit line of the second memory array. The second bit line of the first memory array is adjacent to the first bit line of the first memory array, and the second bit line of the second memory array is adjacent to the first bit line of the second memory array.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully