Dispatching multiply and accumulate operations based on accumulator register index number

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 12061910
APP PUB NO 20210173662A1
SERIAL NO

16703934

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A processor unit for multiply and accumulate (“MAC”) operations is provided. The present invention may include the processor unit having a plurality of MAC units for performing a set of MAC operations. The present invention may include each MAC unit having an execution unit and a one-write one-read (“1W/1R”) register file, where the 1W/1R register file may have at least one accumulator. The present invention may include the execution unit of each MAC unit being configured to perform a subset of MAC operations by computing a product of a set of values received from another register file of the processor unit and adding the computed product to the at least one accumulator. The present invention may include each MAC unit being configured to perform the respective subset of MAC operations in a single clock cycle.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Leenstra, Jentje Bondorf, DE 41 583
Moreira, Jose E Irvington, US 72 789
Thompto, Brian W Austin, US 143 831
Wagner, Andreas Weil im Schönbuch, DE 88 680

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