Fabricating method of photomask, photomask structure thereof, and semiconductor manufacturing method using the same

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United States of America Patent

PATENT NO 12055850
APP PUB NO 20230266661A1
SERIAL NO

18297636

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Abstract

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A circuit layout patterning method includes: receiving a photomask substrate including a shielding layer; defining a chip region and a peripheral region adjacent to the chip region; forming a design pattern in the chip region; forming a reference pattern by emitting one first radiation shot and a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; comparing a width of the reference pattern and a width of the beta pattern; transferring the design pattern to the shielding layer if a difference between the width of the reference patterned and the width of the beta pattern is within a tolerance; and transferring the design pattern of the photomask to a semiconductor substrate.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Hao-Ming Pingtung, TW 59 184
Chen, Chih-Ming Taoyuan, TW 467 5678
Huang, Chung-Yang Chiayi County, TW 26 61
Lin, Cheng-Ming Yunlin County, TW 100 187

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