Successive approximation register analog to digital converter device and signal conversion method

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United States of America Patent

PATENT NO 12034451
APP PUB NO 20230116785A1
SERIAL NO

17870958

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Abstract

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A successive approximation register analog to digital converter device includes first and second digital to analog converter (DAC) circuits, a comparator circuit, a controller circuit, and a dynamic element matching (DEM) circuit. The first and second DAC circuits samples an input signal. The comparator circuit and the controller circuit generate first and second bits according to outputs of the first and second DAC circuits. The DEM circuit encodes the first bits to generate third bits, in order to refresh the first DAC circuit. After the first DAC circuit is refreshed, the controller circuit resets partial bits in the second bits. After the partial bits are reset, the comparator circuit generates comparison results according to outputs of the first and second DAC circuits. The controller circuit generates fourth bits according to the comparison results, and generates a digital output according to the first, second, and fourth bits.

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Patent Owner(s)

Patent OwnerAddress
REALTEK SEMICONDUCTOR CORPORATIONNO 2 INNOVATION RD II HSINCHU SCIENCE PARK HSINCHU 30076

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huang, Shih-Hsiung Hsinchu, TW 139 320
Wu, Yen-Ting Hsinchu, TW 30 22
Yang, Jun Suzhou, CN 792 8454

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