Controlling duty cycle distortion with a mixed-signal circuit

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United States of America

PATENT NO 12003241
SERIAL NO

18149016

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Abstract

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Controlling Duty Cycle Distortion with a Mixed-Signal Circuit A method controls the duty cycle distortion of clock signals. An electronic device obtains an input clock signal and generates a first output voltage and a second output voltage from the input clock signal. The first output voltage has a first direct current (DC) voltage level indicating, in real time, a first duty cycle length of high voltage duty cycles of the input clock signal. The second output voltage has a second DC voltage level indicating, in real time, a second duty cycle length of low voltage duty cycles of the input clock signal. The difference between the first and second DC voltage levels corresponds to the duty cycle distortion level of the input clock signal. A duty cycle control signal is generated based on the difference between the first and second DC voltage levels to control the high voltage duty cycles of the input clock signal.

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Patent Owner(s)

Patent OwnerAddress
PARADE TECHNOLOGIES LTD2720 ORCHARD PARKWAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jin, Xin San Jose, US 477 3740
Lee, Andrew Taipei, TW 155 8193
Lee, YingFan Taipei, TW 4 1
Lu, Zhih-Ling Taipai, TW 3 1

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