High bandwidth integrated multiplexer and driver stage for transmitter
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United States of America
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Jun 4, 2024
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N/A
app pub date -
Oct 28, 2022
filing date -
Oct 28, 2022
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Abstract
A system for serializing data includes, in part, serialization circuitry configured to convert input data provided through parallel input streams into a lesser number of parallel output streams. The input data is converted through sampling based on a set of clock signals that are phase-offset. The system further includes a pre-driver circuit having combinational logic including a first multiplexer. The first multiplexer is configured to generate an output of the pre-driver circuit through combining the converted input data such that the number of parallel output streams is reduced. The system further includes a driver circuit configured to generate, using the output of the pre-driver circuit, a final output stream corresponding to the input data in serial format. The driver circuit is integrated with a second multiplexer, with the output of the pre-driver circuit operating as both control input and data input to the second multiplexer.
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