Clock data recovery circuit and method having quick locking and bandwidth stabilizing mechanism

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United States of America

PATENT NO 11967959
SERIAL NO

17861657

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Abstract

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The present invention discloses a clock data recovery method having quick locking and bandwidth stabilizing mechanism used in a clock data recovery circuit. A relative position relation between a serial data and a sampling clock is detected by a phase detection circuit in an adaptive control period to generate a tracking direction. The tracking direction of a first clock period is directly outputted as an adaptive tracking direction by an adaptive tracking circuit. For each of the clock periods behind the first clock period, a previous tracking direction is replaced by a current tracking direction only when the current tracking direction exists and is different from the previous tracking direction of a previous clock period such that an actual tracking direction is generated when the adaptive tracking direction changes. The phase of the sampling clock is adjusted according to the actual tracking direction by a clock control circuit.

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Patent Owner(s)

Patent OwnerAddress
REALTEK SEMICONDUCTOR CORPORATIONNO 2 INNOVATION RD II HSINCHU SCIENCE PARK HSINCHU 30076

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Liu, Hsi-En Hsinchu, TW 7 0

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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges12269601 - 1001002003004005006007008009001000110012001300

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