Solid-state image-capturing element having floation diffusion and hollow regions

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United States of America

PATENT NO 11929380
SERIAL NO

17501135

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Abstract

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There is provided a solid-state image-capturing element capable of reducing the capacitance by using a hollow region. At least a part of a region between an FD wiring connected to a floating diffusion and a wiring other than the FD wiring is a hollow region. The present disclosure can be applied to a CMOS image sensor having, for example, a floating diffusion, a transfer transistor, an amplifying transistor, a selection transistor, a reset transistor, and a photodiode.

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Patent Owner(s)

  • SONY SEMICONDUCTOR SOLUTIONS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Matsunuma, Takeshi Kanagawa, JP 25 328
Nagano, Takashi Kanagawa, JP 84 1061
Tanaka, Yusuke Kanagawa, JP 410 2974
Wakano, Toshifumi Kanagawa, JP 123 986

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