Contaminant collection on SOI

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United States of America Patent

PATENT NO 11901462
APP PUB NO 20230307557A1
SERIAL NO

17665497

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Abstract

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An integrated circuit includes an SOI substrate having a semiconductor layer over a buried insulator layer; the semiconductor layer contains white space regions that include a PWELL region. An electronic device includes an NWELL region in the semiconductor layer, a dielectric over the NWELL region, and a polysilicon plate over the dielectric. A sacrificial NWELL ring is adjacent to and separated from the NWELL region by a first gap.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATED12500 TI BOULEVARD MS 3999 DALLAS TX 75243

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Jingjing Santa Clara, US 58 60
Guo, Honglin Dallas, US 29 64
Lee, Zachary K Fremont, US 23 226

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