Static random access memory device
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United States of America Patent
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Jan 16, 2024
Grant Date -
Nov 3, 2022
app pub date -
Jan 17, 2022
filing date -
May 3, 2021
priority date (Note) -
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status (Latency Note)
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Abstract
Disclosed is a static random access memory (SRAM) device. According to example embodiments of the present disclosure, a control logic of the SRAM device may include a tracking circuit connected with metal lines for tracking the number of columns of a memory cell array and the number of rows of the memory cell array. By the tracking circuit, a length of word lines of the memory cell array and a length of bit lines of the memory cell array may be tracked. The control logic of the SRAM device may generate control pulses optimized for the size of the memory cell array, based on a tracking result(s) of the tracking circuit. Accordingly, a power and a time necessary for a write operation and a read operation may be reduced.
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