Boundary design for high-voltage integration on HKMG technology
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United States of America Patent
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Dec 26, 2023
Grant Date -
Nov 3, 2022
app pub date -
Jul 19, 2022
filing date -
Feb 21, 2020
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Abstract
The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed over the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.
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