Polarization controlled transistor
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United States of America Patent
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Dec 19, 2023
Grant Date -
N/A
app pub date -
Jul 2, 2020
filing date -
Jul 2, 2020
priority date (Note) -
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Abstract
A transistor includes a first layer comprising a group III-nitride semiconductor. A second layer comprising a group III-nitride semiconductor is disposed over the first layer. A third layer comprising a group III-nitride semiconductor is disposed over the second layer. An interface between the second layer and the third layer form a polarization heterojunction. A fourth layer comprising a group III-nitride semiconductor is disposed over the third layer. An interface between the third layer and the fourth layer forms a pn junction. A first electrical contact pad is disposed on the fourth layer. A second electrical contact pad is disposed on the third layer. A third electrical contact pad is electronically coupled to bias the polarization heterojunction.
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