Scratchpad memory in a cache

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United States of America Patent

PATENT NO 11841796
APP PUB NO 20220229778A1
SERIAL NO

17569336

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Abstract

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Methods, systems, and devices for scratchpad memory in a cache are described. A device may operate a portion of a volatile memory in a cache mode having non-deterministic latency for satisfying requests from a host device. The device may monitor a register with an output pin that is associated with the portion and indicative of an operating mode of the portion. Based on or in response to monitoring the output pin, the device may determine whether to change the operating mode of the portion from the cache mode to a scratchpad mode having deterministic latency for satisfying requests from the host device.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INC2805 EAST COLUMBIA ROAD BOISE ID 83706

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ballapuram, Chinnakrishnan San Jose, US 31 132
Malik, Saira Samar Lafayette, US 20 9
Song, Taeksang San Jose, US 47 15

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